• DocumentCode
    465054
  • Title

    A Methodology for Efficient Space-Time Adapter Design Space Exploration: A Case Study of an Ultra Wide Band Interleaver

  • Author

    Chavet, C. ; Coussy, P. ; Urard, P. ; Martin, E.

  • Author_Institution
    STMicroelectronics, Crolles
  • fYear
    2007
  • fDate
    27-30 May 2007
  • Firstpage
    2946
  • Lastpage
    2949
  • Abstract
    This paper presents a solution to efficiently explore the design space of communication adapters. In most digital signal processing (DSP) applications, the overall architecture of the system is significantly affected by communication architecture, so the designers need specifically optimized adapters. By explicitly modeling these communications within an effective graph-theoretic model and analysis framework, we automatically generate an optimized architecture, named Space-Time AdapteR (STAR). Our design flow inputs a C description of input/output data scheduling, and user requirements (throughput, latency, parallelism...), and formalizes communication constraints through a resource constraints graph (RCG). The RCG properties enable an efficient architecture space exploration in order to synthesize a STAR component. The proposed approach has been tested to design an industrial data mixing block example: an ultra-wideband interleaver.
  • Keywords
    digital signal processing chips; graph theory; integrated circuit design; integrated circuit modelling; ultra wideband technology; C description; STAR component; analysis framework; architecture space exploration; communication adapters; digital signal processing applications; graph-theoretic model; input/output data scheduling; resource constraints graph; space-time adapter design space exploration; ultra wide band interleaver; Delay; Design optimization; Digital signal processing; High level synthesis; Job shop scheduling; Parallel processing; Space exploration; Throughput; Timing; Ultra wideband technology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
  • Conference_Location
    New Orleans, LA
  • Print_ISBN
    1-4244-0920-9
  • Type

    conf

  • DOI
    10.1109/ISCAS.2007.377867
  • Filename
    4253296