Title :
A Double-Issue Java Processor Design for Embedded Applications
Author :
Ko, Hou-Jen ; Tsai, Chun-Jen
Author_Institution :
Dept. of Comput. Sci., National Chiao Tung Univ., Hsinchu
Abstract :
Java applications for embedded systems are becoming popular today. CLDC/MIDP is the standard application platform for mobile phones while CDC/PBP is the emerging application platform for next generation digital TV set-top boxes. Although software-based Java virtual machines (VM) are prevalent, most of these VMs require a host processor running at much higher clock rate than 300MHz to reach reasonable performance. This is beyond the recommended specification of handsets and set-top boxes. In this paper, we have proposed a double-issue Java processor for embedded systems. The design is not tied to any host processors and can be used as an efficient binary execution engine for a full Java runtime environment implementation. When synthesized on a Virtex IV FPGA (4VFX12FF66-10), the RTL model can reach over 100MHz and consumes less than 22% resources of the device.
Keywords :
Java; embedded systems; field programmable gate arrays; virtual machines; Java processor; Java runtime environment; Virtex IV FPGA; binary execution engine; embedded applications; Application software; Clocks; Digital TV; Embedded system; Java; Mobile handsets; Process design; Virtual machining; Virtual manufacturing; Voice mail;
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
DOI :
10.1109/ISCAS.2007.378382
