Low power variable block size motion estimation using pixel truncation

This paper presents a method of low-power variable-block-size motion estimation using pixel truncation. Previous work focused on implementing pixel truncation using fixed-block-size motion estimation. However, pixel truncation fails to give satisfactory results for smaller block partitions. In this paper, we analyse the effect of truncating pixels for smaller block partitions and propose a method to improve the frame prediction. To further reduce power consumption, we adopt low-complexity matching criteria for the highly truncated bit. The low-complexity matching criteria can work together with pixel truncation to reduce computational complexity without significantly degrading picture quality.