DocumentCode :
465184
Title :
A Flexible Embedded SRAM IP Compiler
Author :
Xu, Yi ; Gao, Zhiqiang ; He, Xiangqing
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing
fYear :
2007
fDate :
27-30 May 2007
Firstpage :
3756
Lastpage :
3759
Abstract :
Static random access memory (SRAM) compiler is the silicon compiler that generates SRAM IP cores with various specifications. A high performance and flexible SRAM compiler is proposed in this paper. Our compiler uses block assembly techniques with uniform physical data syntax. This encapsulates the compiler from low level module information. Hence it is self-adaptive to the migration of technology nodes. Our experiment result shows that this compiler can generate a wide capacity range of SRAM with relatively high performance.
Keywords :
SRAM chips; circuit layout CAD; elemental semiconductors; embedded systems; logic design; program compilers; silicon; Si; atatic random access memory; block assembly techniques; embedded SRAM IP compiler; physical data syntax; silicon compiler; Assembly; Capacitance; Circuits; Energy consumption; Graphical user interfaces; Helium; Microelectronics; Random access memory; SRAM chips; Silicon compiler;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
Type :
conf
DOI :
10.1109/ISCAS.2007.378778
Filename :
4253498
Link To Document :
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