Author :
Jiang, Zhanyuan ; Hu, Shiyan ; Shi, Weiping
Abstract :
Twisted differential line structure can effectively reduce crosstalk noise on global bus, which foresees a wide applicability. However, measured performance based on fabricated circuits is much worse than simulated performance based on the layout. It is suspected that the via resistance variation is the cause. In this paper, our extensive simulation confirm this. A new redundant via insertion technique is proposed to reduce via variation and signal distortion. In addition, a new buffer insertion technique is proposed to synchronize the transmitted signals, thus further improving the effectiveness of the twisted differential line. Experimental results demonstrate that the new approaches are highly effective. Under a realistic setup, a 6 GHz signal can be transmitted with high fidelity using the new approaches. In contrast, only a 100 MHz signal can be reliably transmitted using a single-end model with power/ground shielding. In addition, compared to conventional twisted differential line structure, our new techniques can reduce the magnitude of noise by 45%. Furthermore, compared to unbuffered twisted differential line structure, the maximum signal phase difference is reduced from 37ps to 7ps by the new buffer insertion technique. Categories and Subject Descriptors: B.8.2 [Performance and Reliability]:Performance Analysis and Design Aids General Terms: Algorithm, Design, Performance, Reliability.
Keywords :
VLSI; crosstalk; distortion; integrated circuit interconnections; buffer insertion technique; crosstalk noise; global bus design; signal distortion; twisted differential line structure; Algorithm design and analysis; Circuit simulation; Crosstalk; Distortion measurement; Electrical resistance measurement; Frequency synchronization; Noise reduction; Performance analysis; Permission; Very large scale integration; Algorithm; Design; Differential line; Global bus; Performance; Redundant via; Reliability;