Title :
New Test Data Decompressor for Low Power Applications
Author :
Mrugalski, Grzegorz ; Rajski, Janusz ; Czysz, Dariusz ; Tyszer, Jerzy
Author_Institution :
Mentor Graphics Corp., Wilsonville
Abstract :
The paper presents a novel low power test scheme integrated with the embedded deterministic test environment. It reduces significantly switching rates in scan chains with minimal hardware modification. Experimental results obtained for industrial circuits clearly indicate that switching activity can be reduced up to 150 times along with improved compression ratios.
Keywords :
integrated circuit reliability; integrated circuit testing; compression ratios; data decompressor; industrial circuits; low power test scheme; switching activity; Automatic test pattern generation; Circuit noise; Circuit testing; Design for testability; Graphics; Integrated circuit reliability; Logic testing; Power dissipation; Test pattern generators; Voltage; Algorithms; Compression; Design; Reliability; Theory; VLSI test; low power;
Conference_Titel :
Design Automation Conference, 2007. DAC '07. 44th ACM/IEEE
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-59593-627-1
