• DocumentCode
    465389
  • Title

    A General Framework for Spatial Correlation Modeling in VLSI Design

  • Author

    Liu, F.

  • Author_Institution
    IBM, Austin
  • fYear
    2007
  • fDate
    4-8 June 2007
  • Firstpage
    817
  • Lastpage
    822
  • Abstract
    Many characteristics of VLSI designs, such as process variations, demonstrate strong spatial correlations. Accurately modeling of these correlated behaviors is crucial for many timing and power analyses to be valid. This paper proposes a new spatial model with a long-range trend component, a smooth correlation component, as well as a truly random component. The efficient method to construct such a spatial model is based on the Generalized Least Square fitting and the structured correlation functions, which are actually the generalization of the popular Pelgrom mismatch models. Experimental results on industrial benchmarks show that the method is not only highly effective for variability modeling, but can also be used for other spatially distributed characteristics such as IR drops and on-chip temperature distributions.
  • Keywords
    VLSI; integrated circuit design; least squares approximations; IR drops; Pelgrom mismatch models; VLSI; generalized least square fitting; long-range trend component; on-chip temperature distributions; power a analyses; smooth correlation component; spatial correlation modeling; timing; CMOS technology; Fitting; Least squares methods; Permission; Process design; Semiconductor device modeling; Temperature distribution; Threshold voltage; Timing; Very large scale integration; Algorithms; Generalized Least Square Fitting; Measurement; Spatial Correlation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2007. DAC '07. 44th ACM/IEEE
  • Conference_Location
    San Diego, CA
  • ISSN
    0738-100X
  • Print_ISBN
    978-1-59593-627-1
  • Type

    conf

  • Filename
    4261296