DocumentCode :
466433
Title :
Multi-processor system design with ESPAM
Author :
Stefanov, Todor ; Deprettere, Ed ; Nikolov, Hristo
Author_Institution :
Leiden Univ., Leiden
fYear :
2006
fDate :
22-25 Oct. 2006
Firstpage :
211
Lastpage :
216
Abstract :
For modern embedded systems, the complexity of embedded applications has reached a point where the performance requirements of these applications can no longer be supported by embedded system architectures based on a single processor. Thus, the emerging embedded System-on-Chip platforms are increasingly becoming multiprocessor architectures. As a consequence, two major problems emerge, i.e., how to design and how to program such multiprocessor platforms in a systematic and automated way in order to reduce the design time and to satisfy the performance needs of applications executed on these platforms. Unfortunately, most of the current design methodologies and tools are based on Register Transfer Level (RTL) descriptions, mostly created by hand. Such methodologies are inadequate, because creating RTL descriptions of complex multiprocessor systems is error-prone and time consuming. As an efficient solution to these two problems, in this paper we propose a methodology and techniques implemented in a tool called ESPAM for automated multiprocessor system design and implementation. ESPAM moves the design specification from RTL to a higher, so called system level of abstraction. We explain how starting from system level platform, application, and mapping specifications, a multiprocessor platform is synthesized and programmed in a systematic and automated way. Furthermore, we present some results obtained by applying our methodology and ESPAM tool to automatically generate multiprocessor systems that execute a real-life application, namely a Motion-JPEG encoder.
Keywords :
embedded systems; logic CAD; microprocessor chips; multiprocessing systems; system-on-chip; embedded system; motion-JPEG encoder; multiprocessor architecture; multiprocessor system design; register transfer level; system-on-chip; Application software; Computational modeling; Computer networks; Computer science; Design automation; Design methodology; Embedded system; Multiprocessing systems; System-on-a-chip; Unsolicited electronic mail; Kahn process networks; heterogeneous MPSoCs; system-level design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Hardware/Software Codesign and System Synthesis, 2006. CODES+ISSS '06. Proceedings of the 4th International Conference
Conference_Location :
Seoul
Print_ISBN :
1-59593-370-0
Electronic_ISBN :
1-59593-370-0
Type :
conf
DOI :
10.1145/1176254.1176306
Filename :
4278517
Link To Document :
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