Title :
Lithography Solutions for a 0.35μm 25V PDMOS Technology
Author :
Williams, Brett ; Thomason, Mike ; Belisle, Chuck ; Greenwood, Bruce
Author_Institution :
AMI Semiconductor Inc., Pocatello
Abstract :
Lateral extended-drain MOS transistors (DMOS) are very sensitive to the well and reduced surface field (RESURF) implant critical dimensions (CDs) as well as the layer-to-layer alignment (overlay). The photoresist that is used for the well and RESURF implants of the DMOS was originally highly dependant on reticle transmission (RT). This caused significant variability in the P-channel DMOS (PDMOS) performance, while the N-channel DMOS (NDMOS) performance remained stable. The lithography solutions to improve the robustness of the DMOS structures are discussed in this paper.
Keywords :
MOS integrated circuits; photolithography; photoresists; reticles; N-channel DMOS; P-channel DMOS; PDMOS technology; RESURF implants; lateral extended-drain MOS transistors; layer-to-layer alignment; lithography solutions; photoresist; reduced surface field implant critical dimensions; reticle transmission; size 0.35 mum; voltage 25 V; Ambient intelligence; Boron; CMOS technology; Implants; Isolation technology; Lithography; MOS devices; MOSFETs; Resists; Testing;
Conference_Titel :
University/Government/Industry Microelectronics Symposium, 2006 16th Biennial
Conference_Location :
San Jose, CA
Print_ISBN :
1-4244-0267-0
DOI :
10.1109/UGIM.2006.4286383
