Title :
Implementation of On-line Error Detecting, Constant Delay, Carry Free Adder
Author :
Asmath, Yugandhar
Author_Institution :
San Jose State Univ., San Jose
Abstract :
This work is derived from the implementation of design proposed by Whitney J. Townsend, Mitchell A. Thornton and Parag K. Lala in ´On-line error detection in a carry-free adder´ (2004). The circuit was implemented using AMI06 process to function at 200 MHz clock. The observations made from the implementation were studied and a more generalized, simple and cost effective error detecting technique is proposed.
Keywords :
adders; delays; error detection; logic design; 200 MHz clock; AMI06 process; carry free adder; constant delay; cost effective error detecting technique; on-line error detection; Added delay; Adders; Arithmetic; Circuit faults; Combinational circuits; Computer errors; Error correction; Logic circuits; Rails; Redundancy;
Conference_Titel :
University/Government/Industry Microelectronics Symposium, 2006 16th Biennial
Conference_Location :
San Jose, CA
Print_ISBN :
1-4244-0267-0
DOI :
10.1109/UGIM.2006.4286388
