1-V Ultra-Low-Power CMOS LC VCO with Dynamic Body Biasing

Ultra-low power analog/RF CMOS circuits are critical for battery-operated electronics. The current reuse technique for CMOS LC VCO design has the benefit of low current consumptions, meeting the requirement of low-voltage and low-power applications. The advantage of this technique comes with the price of severe drain current sensitivity to process and power supply variations. This paper presents a body biasing technique, which dynamically adjusts the threshold voltage to overcome the process and supply variations. The simulation results show that with the proposed technique the variations in current consumption due to uncertainty of the process parameters and supply voltage deviations could be successfully compensated. The current consumption of the additional feedback circuit is a small percentage of the overall current consumption (<5%). The phase noise and FOM performance are not degenerated by the additional feedback circuit.