DocumentCode
467621
Title
Design and Implementation of a 90nm Low bit-rate Image Compression Core
Author
Corsonello, Pasquale ; Perri, Stefania ; Staino, Giovanni ; Lanuzza, Marco ; Cocorullo, Giuseppe
Author_Institution
Dept. of Electron., Comput. Sci. & Syst., Univ. of Calabria, Rende, Italy
fYear
2007
fDate
29-31 Aug. 2007
Firstpage
383
Lastpage
389
Abstract
This paper presents a low-cost, high throughput discrete wavelet transform-based image compressor. The hardware solution proposed here exploits a modified set partitioning in hierarchical trees (SPIHT) algorithm and ensures that appropriate reconstructed image qualities can be achieved also for compression ratios over 100:1. Obtained results demonstrate that a maximum data rate of about 23 Mpixels/s can be sustained on a 64x64 size tile. In 90 nm technology, the required area is only 1.77 mm2. To obtain higher performance, multiples cores can be used in a parallel implementation.
Keywords
data compression; discrete wavelet transforms; image coding; image reconstruction; trees (mathematics); discrete wavelet transform-based image compressor; hardware solution; image reconstruction; low bit-rate image compression core; set partitioning in hierarchical trees algiorithm; CMOS technology; Discrete wavelet transforms; Hardware; Image coding; Image quality; Image reconstruction; Partitioning algorithms; Throughput; Tiles; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on
Conference_Location
Lubeck
Print_ISBN
978-0-7695-2978-3
Type
conf
DOI
10.1109/DSD.2007.4341496
Filename
4341496
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