DocumentCode :
467819
Title :
Local Learning for S_CMAC_GBF
Author :
Chiang, Ching-Tsan ; Hsu, Chia-wei ; Chung, Chao-Ming
Author_Institution :
Ching Yun Univ., Tao-Yuan
Volume :
4
fYear :
2007
fDate :
19-22 Aug. 2007
Firstpage :
2012
Lastpage :
2017
Abstract :
This paper proposed a method of the local learning for S_CMAC_GBF. CMAC_GBF performs better than CMAC in the learning convergence speed and accuracy. The advantages of S_CMAC_GBF are simpler addressing structure, lower consuming memory space and easier hardware application, and it will not degrade the accuracy of the original input. For achieving better learning efficiency and speeding the hardware output, this paper proposed the local learning to perform more efficient learning. In local learning, every area only use better relative weights rather than use all weights, so the computation can be speed up in learning. Because in the hardware output, it only needs to calculate better relative weights, therefore, the learning speed is greatly increased. Although local learning lowers down the output accuracy of S_CMAC_GBF, the advantage of using S_CMAC_GBF is not affected, especially in the hardware application; the accuracy is almost the same. In the paper, a FPGA chip is employed to demonstrate the better hardware efficiency.
Keywords :
cerebellar model arithmetic computers; field programmable gate arrays; learning (artificial intelligence); microprocessor chips; FPGA chip; S_CMAC_GBF; cerebellar model arithmetic computers; general basis function; local learning convergence; Chaos; Cybernetics; Machine learning; FPGA; Local learning; S_CMAC_GBF;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Machine Learning and Cybernetics, 2007 International Conference on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4244-0973-0
Electronic_ISBN :
978-1-4244-0973-0
Type :
conf
DOI :
10.1109/ICMLC.2007.4370477
Filename :
4370477
Link To Document :
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