DocumentCode :
46817
Title :
An INL Yield Model of the Digital-to-Analog Converter
Author :
Park, H. Andy ; Chih-Kong Ken Yang
Author_Institution :
Univ. of California, Los Angeles, Los Angeles, CA, USA
Volume :
60
Issue :
3
fYear :
2013
fDate :
Mar-13
Firstpage :
582
Lastpage :
592
Abstract :
The integral nonlinearity (INL) yield of any arbitrarily segmented digital-to-analog converter (DAC) has not been accurately modeled and requires long simulation time. This paper proposes an intuitive formulation of the INL yield that leads to a simple and accurate relation between the variation of the unit source element and the DAC yield with only a few fitting parameters. These parameters can be determined for varying number of bits and varying DAC segmentation. A table of parameters is provided that can be directly applied to determine the yield without additional simulation. The validity of the model and parameters is demonstrated for measured current distributions from a current-steering DAC fabricated in a 90-nm CMOS technology.
Keywords :
CMOS integrated circuits; current distribution; digital-analogue conversion; CMOS technology; DAC segmentation; INL yield model; current distributions; current-steering DAC; digital-to-analog converter; integral nonlinearity yield model; size 90 nm; Accuracy; Approximation methods; Correlation; Equations; Mathematical model; Probability density function; Random variables; Digital-to-analog converter; INL; multivariate Gaussian random variable; segmentation; static linearity;
fLanguage :
English
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-8328
Type :
jour
DOI :
10.1109/TCSI.2012.2215114
Filename :
6311444
Link To Document :
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