Title :
Implementation of Novel Bit Loading Algorithm with Power Cut-Back in ADSL Transmitter on DSP
Author :
Ravishankar, S. ; Padmaja, K.V. ; Uma, B.V.
Author_Institution :
R.V. Coll. of Eng., Bangalore
Abstract :
ADSL (Asymmetric Digital Subscriber Line) adopts modulation scheme called DMT (Discrete multi tone), a multi carrier system. The process of allocating bits into various sub-channels is called bit-loading. In this paper, a new bit-loading algorithm that reduces the power required to transmit data is proposed. Comparison on power cut back with other algorithms is presented. Also the implementation of the algorithm in the transmitter is discussed. A Matlab simulation model has been developed to simulate ADSL transmitter (with bit-loading), channel and receiver. The ADSL system with bit-loading algorithm is also implemented in hardware using TT´s DSK6713 kit and comparison of software and hardware results are tabulated.
Keywords :
data communication; digital subscriber lines; ADSL transmitter; Asymmetric Digital Subscriber Line; DSP; Matlab simulation model; bit loading algorithm; bits allocation; data transmission; digital signal processing chip; discrete multi tone; modulation scheme; multi carrier system; power cut-back; sub-channel; Additive white noise; Crosstalk; Digital signal processing; Frequency; Gaussian noise; Hardware; Mathematical model; OFDM modulation; Power engineering and energy; Transmitters;
Conference_Titel :
Conference on Computational Intelligence and Multimedia Applications, 2007. International Conference on
Conference_Location :
Sivakasi, Tamil Nadu
Print_ISBN :
0-7695-3050-8
DOI :
10.1109/ICCIMA.2007.139
