DocumentCode :
469451
Title :
Hardware-based TCP processor for Gigabit Ethernet
Author :
Uchida, Tomohisa
Author_Institution :
Univ. of Tokyo, Tokyo
Volume :
1
fYear :
2007
fDate :
Oct. 26 2007-Nov. 3 2007
Firstpage :
309
Lastpage :
315
Abstract :
Transmission Control Protocol (TCP) and Ethernet have been widely used in readout systems. These protocols are de facto standards and have been implemented on standard operating systems. However, some small devices, e.g., front-end devices and detectors, are not capable of employing these protocols because of hardware size limitations. This paper describes a TCP processor for Gigabit Ethernet with a circuit size suitable for implementing on a single Field Programmable Gate Array. The only peripheral device required is a single Ethernet Physical Layer Device. The hardware was implemented and its TCP throughput was measured. The throughputs in both directions simultaneously were at the upper limits of Gigabit Ethernet. The processor described here allows adoption of TCP/Ethernet in small devices that have hardware size limitations.
Keywords :
high energy physics instrumentation computing; local area networks; nuclear electronics; readout electronics; transport protocols; Ethernet physical layer device; field programmable gate array; front-end devices; gigabit Ethernet; hardware-based TCP processor; operating systems; peripheral device; readout systems; transmission control protocol; Circuits; Control systems; Detectors; Ethernet networks; Field programmable gate arrays; Hardware; Operating systems; Physical layer; Protocols; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nuclear Science Symposium Conference Record, 2007. NSS '07. IEEE
Conference_Location :
Honolulu, HI
ISSN :
1095-7863
Print_ISBN :
978-1-4244-0922-8
Electronic_ISBN :
1095-7863
Type :
conf
DOI :
10.1109/NSSMIC.2007.4436337
Filename :
4436337
Link To Document :
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