Title :
A High Performance 1μm CMOS Process for VLSI Applications
Author :
Doering, R.R. ; Duane, M.P. ; McDavid, J.M. ; Baglee, D.A. ; Clark, D. ; Crank, S. ; Armstrong, G.J.
Author_Institution :
Advanced Development, Texas Instruments Inc., M.S. 631 P.O. Box 1443, Houston, Texas 77001
Abstract :
Feature sizes on circuits for logic and memory applications are rapidly approaching the one micron level. We have developed a lμm CMOS process that uses only seven photolithography steps (including protective overcoat) and has sheet resistivities of less than 1 ohm/sq. for both moat and gate interconnects.
Keywords :
Aluminum; CMOS logic circuits; CMOS process; Conductivity; Implants; Integrated circuit interconnections; Silicides; Titanium; Tungsten; Very large scale integration;
Conference_Titel :
VLSI Technology, 1985. Digest of Technical Papers. Symposium on
Conference_Location :
Kobe, Japan
Print_ISBN :
4-930813-09-3
