Title :
A High Density Single-Poly Si Structure Eeprom with LB (Lowered Barrier Height) Oxide for VLSI´s
Author :
Matsukawa, N. ; Morita, S. ; Shinada, K. ; Miyamoto, J. ; Tsujimoto, J. ; Iizuka, T. ; Nozawa, H.
Author_Institution :
Semiconductor Device Engineering Laboratory, Toshiba Kawasaki 210, Japan
Keywords :
Annealing; Circuits; Contact resistance; EPROM; Ion implantation; Laboratories; Microprocessor chips; Semiconductor devices; Thermionic emission; Very large scale integration;
Conference_Titel :
VLSI Technology, 1985. Digest of Technical Papers. Symposium on
Conference_Location :
Kobe, Japan
Print_ISBN :
4-930813-09-3
