Title :
Speed Enhancements and Key Design Aspects of Charge Buffered Logic
Author :
Wiedmann, S.K. ; Wendel, D.F.
Author_Institution :
IBM Thomas J. Watson Research Center Yorktown Heights, NY 10598
Keywords :
CMOS logic circuits; Circuit synthesis; Cutoff frequency; Delay; Diodes; Logic circuits; Logic design; Switching circuits; Threshold voltage; Very large scale integration;
Conference_Titel :
VLSI Technology, 1986. Digest of Technical Papers. Symposium on
Conference_Location :
San Diego, CA, USA
