DocumentCode
472705
Title
A New Multilevel Interconnection System for Submicron VLSI Using Multilayered Dielectrics of Plasma Silicon Oxide and Low Thermal Expansion Polyimide
Author
Misawa, Y. ; Kinjo, N. ; Hirao, M. ; Numata, S. ; Momma, N.
Author_Institution
Hitachi Research Laboratory, Hitachi, Ltd. 4026 Kuji-cho, Hitachi-shi, Ibaraki-ken, 319-12, Japan
fYear
1986
fDate
28-30 May 1986
Firstpage
59
Lastpage
60
Keywords
Dielectrics; Dry etching; Fabrication; Planarization; Plasma applications; Polyimides; Silicon; Sputter etching; Thermal expansion; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 1986. Digest of Technical Papers. Symposium on
Conference_Location
San Diego, CA, USA
Type
conf
Filename
4480369
Link To Document