Title :
A New Multilevel Interconnection System for Submicron VLSI Using Multilayered Dielectrics of Plasma Silicon Oxide and Low Thermal Expansion Polyimide
Author :
Misawa, Y. ; Kinjo, N. ; Hirao, M. ; Numata, S. ; Momma, N.
Author_Institution :
Hitachi Research Laboratory, Hitachi, Ltd. 4026 Kuji-cho, Hitachi-shi, Ibaraki-ken, 319-12, Japan
Keywords :
Dielectrics; Dry etching; Fabrication; Planarization; Plasma applications; Polyimides; Silicon; Sputter etching; Thermal expansion; Very large scale integration;
Conference_Titel :
VLSI Technology, 1986. Digest of Technical Papers. Symposium on
Conference_Location :
San Diego, CA, USA