Title :
A New Soft-Error Immune DRAM Cell Using Stacked CMOS Structure
Author :
Terada, K. ; Kurosawa, S. ; Takeshima, T.
Author_Institution :
Microelectronics Res. Labs. NEC Corporation 4-1-1 Miyazaki, Miyamae-ku, Kawasaki, 213, Japan
Keywords :
Capacitance; Capacitors; Charge carrier processes; Leakage current; MOSFET circuits; Neural networks; Random access memory; Variable structure systems; Voltage; Writing;
Conference_Titel :
VLSI Technology, 1986. Digest of Technical Papers. Symposium on
Conference_Location :
San Diego, CA, USA
