A Trench Isolation Technology for High-Speed and Low-Power Dissipation Bipolar LSI´s

Author

Sakai, H. ; Kikuchi, K. ; Kameyama, S. ; Kajiyama, M. ; Komeda, T.

Author_Institution

Semiconductor Research Center Matsushita Electric Industrial Co., Ltd. Moriguchi, Osaka 570, Japan

fYear

1987

fDate

22-23 May 1987

Firstpage

Lastpage

Keywords

Capacitance; Delay effects; Diodes; Etching; Isolation technology; Leakage current; Power dissipation; Silicon; Substrates; Wiring;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 1987. Digest of Technical Papers. Symposium on

Conference_Location

Karuizawa, Japan

Type

Filename

4480400

Link To Document