DocumentCode :
472755
Title :
Submicron Gap Planarization with Photo CVD and Spin-on-Glass Multi-Layers for Multi-Level Interconnections
Author :
Yano, K. ; Tanimura, S. ; Ueda, T. ; Fujita, T.
Author_Institution :
Semiconductor Research Center Matsushita Electric Industrial Co., Ltd., Moriguchi, Osaka, Japan
fYear :
1987
fDate :
22-23 May 1987
Firstpage :
71
Lastpage :
72
Keywords :
Dielectrics; Gases; Lamps; Leakage current; Metals industry; Planarization; Scanning electron microscopy; Substrates; Surface morphology; Temperature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 1987. Digest of Technical Papers. Symposium on
Conference_Location :
Karuizawa, Japan
Type :
conf
Filename :
4480427
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=472755
بازگشت