472765

A High Density 4Mbit DRAM Process Using a Fully Overlapping Bitline Contact (FOBIC) Trench Cell

Küsters, K.H. ; Enders, G. ; Meyberg, W. ; Benzinger, H. ; Hasler, B. ; Higelin, G. ; Röhl, S. ; Mühlhoff, H.M. ; Müller, W.

Corporate Research and Technology, Techn. Center for Microelectronics Siemens AG, Otto-Hahn-Ring 6, D-8000 Munich 83, West Germany

1987

22-23 May 1987

93

94

Anisotropic magnetoresistance; Capacitance; Dielectrics and electrical insulation; Diodes; Dry etching; Electrons; Leakage current; Random access memory; Stress; Wet etching;

English

ieee

VLSI Technology, 1987. Digest of Technical Papers. Symposium on

Karuizawa, Japan

conf

4480438