Title :
The Potential of Bipolar Devices for VLSI
Author_Institution :
IBM Thomas J. Watson Research Center Yorktown Heights, New York 10598
Keywords :
Contact resistance; Current density; Delay; Doping; Lithography; Logic circuits; MOSFET circuits; Parasitic capacitance; Power dissipation; Very large scale integration;
Conference_Titel :
VLSI Technology, 1981. Digest of Technical Papers. Symposium on
Conference_Location :
Maui, HI, USA
