• DocumentCode
    472826
  • Title

    A CMOS Pair-Transistor Array Masterslice

  • Author

    Fukuda, Hideki ; Yoshimura, Hiroshi ; Adachi, Tohru

  • Author_Institution
    Musashino Electrical Communication Laboratory, NTT Musashino-shi, Tokyo, Japan
  • fYear
    1982
  • fDate
    1-3 Sept. 1982
  • Firstpage
    16
  • Lastpage
    17
  • Keywords
    CMOS logic circuits; Integrated circuit interconnections; Laboratories; Large scale integration; Logic functions; Random access memory; Read only memory; Routing; Very large scale integration; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 1982. Digest of Technical Papers. Symposium on
  • Conference_Location
    Oiso, Japan
  • Type

    conf

  • Filename
    4480557
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=472826