Title :
Improved Modeling of CMOS Latch-Up and VLSI Implications
Author :
Rung, R.D. ; Momose, H.
Author_Institution :
Toshiba Corporation Semiconductor Device Engineering Laboratory Kawasaki, Japan
Keywords :
Current measurement; Electrical resistance measurement; Laboratories; Predictive models; Semiconductor device modeling; Semiconductor devices; Threshold current; Threshold voltage; Very large scale integration; Virtual manufacturing;
Conference_Titel :
VLSI Technology, 1982. Digest of Technical Papers. Symposium on
Conference_Location :
Oiso, Japan
