DocumentCode
472854
Title
Pathfinder - A CAD Tool for Analyzing CMOS Latchup Structures
Author
Faricelli, John ; Frey, Jeffrey
Author_Institution
Cornell University School of Electrical Engineering Ithaca, NY 14853
fYear
1982
fDate
1-3 Sept. 1982
Firstpage
78
Lastpage
79
Keywords
Bipolar integrated circuits; CMOS logic circuits; Circuit simulation; Data mining; Geometry; Logic devices; MOS devices; MOSFETs; Parasitic capacitance; Pathology;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 1982. Digest of Technical Papers. Symposium on
Conference_Location
Oiso, Japan
Type
conf
Filename
4480585
Link To Document