Title :
Sicos - A High Performance Bipolar Structure for VLSI
Author :
Nakazato, Kazuo ; Nakamura, Tohru ; Miyazaki, Takao ; Okabe, Takahiro ; Nagata, Minoru
Author_Institution :
Central Research Laboratory, Hitachi Ltd., Kokubunji, Tokyo 185
Keywords :
Bipolar transistors; Delay effects; Electrodes; Epitaxial layers; Laboratories; Logic circuits; Logic gates; Parasitic capacitance; Substrates; Very large scale integration;
Conference_Titel :
VLSI Technology, 1982. Digest of Technical Papers. Symposium on
Conference_Location :
Oiso, Japan
