Title :
Ti Silicidation Technology for High Speed EPROM Devices
Author :
Kikuchi, Masanori ; Murao, Yukinobu ; Yamamoto, Hirohiko
Author_Institution :
1st LSI Division, NEC Corporation Sagamihara, Kanagawa 229, Japan
Abstract :
Newly developed Ti silicidation technology for the double-polysilicon stacked-gate EPROM memory cell is applied to fabrication of a 64kb EPROM device. Access time reduction by about 10% has been achieved without degrading write/erase and retention characteristics. Simulation result shows that access time reduction by about 30% can be realized by Ti silicidation in a 1¿m 1Mbit EPROM device.
Keywords :
Annealing; Degradation; Delay effects; Delay lines; EPROM; Electrical resistance measurement; Fabrication; Pulse measurements; Semiconductor films; Silicidation;
Conference_Titel :
VLSI Technology, 1983. Digest of Technical Papers. Symposium on
Conference_Location :
Maui, HI, USA
Print_ISBN :
4-930813-05-0
