Title :
A New EEPROM Cell with Dual Control Gate Structure
Author :
Wada, M. ; Hieda, K. ; Shibata, T. ; Iizuka, H.
Author_Institution :
Integrated Circuits Laboratory Toshiba Corporation, Kawasaki, Japan
Keywords :
Capacitance; Degradation; EPROM; Electrons; Laboratories; Nonvolatile memory; Testing; Threshold voltage; Tunneling; Voltage control;
Conference_Titel :
VLSI Technology, 1983. Digest of Technical Papers. Symposium on
Conference_Location :
Maui, HI, USA
Print_ISBN :
4-930813-05-0
