DocumentCode

472934

Title

A New Trench Isolation Technique for MOS VLSI

Author

Ishijima, Toshiyuki ; Terada, Kazuo

Author_Institution

Microelectronics Research Laboratories, NEC Corporation Miyazaki 4-1-1, Miyamaeku, Kawasaki, 213, Japan

fYear

1984

fDate

10-12 Sept. 1984

Firstpage

28

Lastpage

29

Keywords

Boron; Capacitance; Electrodes; Implants; Leakage current; MOSFET circuits; Random access memory; Silicon; Testing; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 1984. Digest of Technical Papers. Symposium on

Conference_Location

San Diego, CA, USA

Print_ISBN

4-930813-08-5

Type

conf

Filename

4480683