Title :
A High Speed 1mb Eprom with Ti Silicided Gate
Author :
Narita, Yoshitaka ; Ohya, Shuichi ; Murao, Yukinobu ; Kikuchi, Masanori
Author_Institution :
1st LSI Division, NEC Corporation Sagamihara, Kanagawa 229, Japan
Abstract :
A high density and high speed 1Mb EPROM has been developed by utilizing both the advanced 1.0 ¿m minimum design rule technology and the Ti silicidation technology. The sheet resistance has been reduced to about 2¿/¿ by the Ti silicidation technology without degrading the programming, erase and retention characteristics. The low sheet resistance word line and the size reduction have been combined to achieve the fast access time of 100ns.
Keywords :
Annealing; Assembly; Delay effects; Delay lines; Dry etching; EPROM; Large scale integration; National electric code; Silicidation; Transistors;
Conference_Titel :
VLSI Technology, 1984. Digest of Technical Papers. Symposium on
Conference_Location :
San Diego, CA, USA
Print_ISBN :
4-930813-08-5
