Title :
Design and performance evaluation of a reconfigurable Delta MIN for MPSOC
Author :
Aydi, Yassine ; Meftali, Samy ; Dekeyser, Jean-Luc ; Abid, Mohamed
Author_Institution :
CES- Nat. Sch. of Eng. of Sfax, Univ. of Lille, Lille
Abstract :
Multiprocessor system on chip is a concept that aims at integrating multiple hardware and software in a chip. Multistage interconnection network has been frequently proposed as connection means in classical multiprocessor systems. They are generally accepted concepts in the semiconductor industry for solving the problems related to an on-chip communication. This paper presents the design of reconfigurable Delta MINs in which the connections change dynamically at run time. Using SystemC timed simulations, performance evaluation of a Delta MINs are given and analyzed.
Keywords :
multiprocessor interconnection networks; performance evaluation; system-on-chip; MPSOC; SystemC timed simulations; multiprocessor system on chip; multiprocessor systems; multistage interconnection network; on-chip communication; performance evaluation; reconfigurable Delta MINs; reconfigurable delta MIN; semiconductor industry; Analytical models; Delay; Design engineering; Multiprocessing systems; Multiprocessor interconnection networks; Network topology; Network-on-a-chip; Performance analysis; Switches; System-on-a-chip; Delta MIN; MPSOC; NOC; Network design; Reconfigurable MIN;
Conference_Titel :
Microelectronics, 2007. ICM 2007. Internatonal Conference on
Conference_Location :
Cairo
Print_ISBN :
978-1-4244-1846-6
Electronic_ISBN :
978-1-4244-1847-3
DOI :
10.1109/ICM.2007.4497674
