Linearized Multi-Level $\Delta \Sigma$ Modulated Wireless Transmitters for SDR Applications Using Simple DLGA Algorithm

This paper proposes a new linearization algorithm, discrete level gain adjustment (DLGA), for linearized high efficiency multi-level delta sigma modulator (ΔΣM)-based transmitter architectures adequate for wideband multi-standard software defined radio (SDR) applications. The new simple linearization DLGA algorithm is deployed instead of using a full digitally predistorted to maintain the linearity of the employed switching-mode power amplifier (SMPA) with a considerable decrease in the complexity of the digital signal processing (DSP) unit. The proposed architecture includes a multi-level envelope ΔΣM (EΔΣM) concurrently with a linearized SMPA, in order to achieve a better trade-off of power efficiency versus linearity. Based on DLGA, instead of envelope elimination and restoration (EER) configuration, three-level envelope LPΔΣM-based transmitter in phase elimination and restoration (PER) configuration was implemented. The bandwidth constraint of the EER configuration was relaxed. First, a multi-level Envelope EΔΣM-based transmitter was studied to determine the optimal number of quantizer levels that could be used. Through MATLAB simulation and measurement results, it was shown that the best performance was achieved with a discrete level signal that has three different power levels, including zero and regardless the phase. From the measurements, the linearized three-level PER-LPEΔΣM transmitter shows an efficiency of 36%, signal-to-noise distortion ratio of 43.8 dB and adjacent channel power ratio of 45 dB.