• DocumentCode
    474438
  • Title

    Routability-driven analytical placement by net overlapping removal for large-scale mixed-size designs

  • Author

    Jiang, Zhe-Wei ; Su, Bor-Yiing ; Chang, Yao-Wen

  • Author_Institution
    Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei
  • fYear
    2008
  • fDate
    8-13 June 2008
  • Firstpage
    167
  • Lastpage
    172
  • Abstract
    Routability is a challenging cost metric for modern large-scale mixed-size placement. Most existing routability-driven placement algorithms apply whitespace allocation to relieve the routing congestion. Nevertheless, we observe that whitespace allocation might worsen the routability of a placement. To remedy this deficiency, we propose in this paper a new direction/technique, called net overlapping removal, to optimize the routability during placement. Unlike most previous works that allocate whitespace among blocks, our approach moves nets apart from congested regions to improve the chip routability. To apply the net overlapping removal technique, we generalize a net bounding-box based congestion evaluation model to handle practical routing constraints and speed up the routability optimization during placement. We further propose a Gaussian smoothing technique to handle the challenging macro porosity issue, arising in modern mixed-size designs with large macros that require to preserve routing resources for inner routing of the macros. Experimental results show that our approaches lead to significantly better routability and running time than previous works for mixed-size placement.
  • Keywords
    Gaussian processes; VLSI; integrated circuit design; network routing; porosity; Gaussian smoothing technique; VLSI design; chip routability; large-scale mixed-size design; macro porosity; net bounding-box based congestion evaluation model; net overlapping removal; routability optimization; routability-driven analytical placement; routing congestion; whitespace allocation; Algorithm design and analysis; Costs; Data engineering; Degradation; Design engineering; Intellectual property; Large-scale systems; Physics computing; Routing; Very large scale integration; Physical Design; Placement; Routability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2008. DAC 2008. 45th ACM/IEEE
  • Conference_Location
    Anaheim, CA
  • ISSN
    0738-100X
  • Print_ISBN
    978-1-60558-115-6
  • Type

    conf

  • Filename
    4555802