Title :
An embedded infrastructure of debug and trace interface for the DSP platform
Author :
Hsieh, Ming-Chang ; Huang, Chih-Tsun
Author_Institution :
Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu
Abstract :
The paper presents an infrastructure for debug and trace of the embedded digital signal processor (DSP) system, consisting of the in-system trace interface and its methodology to optimize the compression rate of the program and data traces. The platform has been implemented in a multimedia dual-core SOC design with little area overhead. Both the benchmark evaluation and realistic system integration justified the efficiency and effectiveness of our approach.
Keywords :
digital signal processing chips; embedded systems; integrated circuit design; system-on-chip; DSP; debug; digital signal processor; embedded infrastructure; multimedia dual-core SOC design; trace interface; Computer science; Digital signal processing; Digital signal processors; Hardware; Ice; Optimization methods; Permission; Programming profession; Signal design; Silicon; Compression; Design for Debug; Digital Signal Processors; Embedded Debug and Trace; Embedded Processors;
Conference_Titel :
Design Automation Conference, 2008. DAC 2008. 45th ACM/IEEE
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-60558-115-6
