DocumentCode :
475375
Title :
Fast deblocking filter implementation method and it’s architecture for H.264/AVC
Author :
Hayashi, Yoshinori ; Song, Tian ; Koeta, Eiji ; Shimamoto, Takashi
Author_Institution :
Grad. Sch. of Eng., Tokushima Univ., Tokushima
Volume :
1
fYear :
2008
fDate :
14-17 May 2008
Firstpage :
465
Lastpage :
468
Abstract :
In this work, a fast implementation method for deblocking filter of H.264/AVC and its architecture are proposed. Proposed method makes use of the correlation of the adjacent pixels to decrease the redundant processing cycles. Simulation results show that using proposed method, the average coding cycles for one macroblock is reduced to 170. It is fast than that of the previous works which considered that the least filtering cycles number for one macroblock is 192. This work also provide an efficient architecture for the proposed method in which a parallel memory access solution and a novel comparison module are proposed. Implementation results show that the proposed architecture can be realized by only 30.14 K gates.
Keywords :
filtering theory; parallel memories; video coding; H.264-AVC; adjacent pixel correlation; average coding cycles; deblocking filter architecture; deblocking filter implementation method; macroblock; parallel memory access solution; Automatic voltage control; Filters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology, 2008. ECTI-CON 2008. 5th International Conference on
Conference_Location :
Krabi
Print_ISBN :
978-1-4244-2101-5
Electronic_ISBN :
978-1-4244-2102-2
Type :
conf
DOI :
10.1109/ECTICON.2008.4600471
Filename :
4600471
Link To Document :
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