Title :
Optimization of Moore control unit with refined state encoding
Author :
Barkalov, A. ; Titarenko, L. ; Chmielewski, S.
Author_Institution :
University of Zielona Gora, POLAND
Abstract :
The method of decrease in the number of PAL macrocells in logic circuit of Moore FSM is proposed. The method is based on simultaneous application of refined state assignment and transformation of the codes of pseudoequivalent states into codes of their classes. The proposed approach permits to decrease the hardware amount without decrease of digital system performance. An example of proposed method application is given.
Keywords :
Algorithm design and analysis; Design optimization; Digital systems; Encoding; Hardware; Logic circuits; Macrocell networks; Programmable logic arrays; Roentgenium; Switches; CPLD; Flow-chart of algorithm; Moore finite-state-machine; PAL macrocells;
Conference_Titel :
Mixed Design of Integrated Circuits and Systems, 2008. MIXDES 2008. 15th International Conference on
Conference_Location :
Poznan, Poland
Print_ISBN :
978-83-922632-7-2
Electronic_ISBN :
978-83-922632-8-9
