A 76 dBΩ, 2mW, 10Gbps optical receiver analog front-end in 80nm CMOS

Author

Mukadam, Mustansir Y. ; Apsel, Alyssa B.

Author_Institution

Dept. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY

fYear

2008

fDate

18-19 Sept. 2008

Firstpage

67

Lastpage

70

Abstract

This paper describes the design of an optical receiver analog front end for a low power, high speed, chip-to-chip or board-to-board communication system. The circuit has been designed in 80 nm CMOS and consumes 2 mW with a 1-V supply. Using active inductors, a transimpedance gain of 62.5 dB-Omega, limiting amplifier gain of 15 dB, and overall bandwidth of 9 GHz was achieved. This work presents the highest gain-bandwidth product and lowest power consumption for optical front-end receivers in this process reported to date.

Keywords

CMOS analogue integrated circuits; inductors; optical interconnections; optical receivers; CMOS; active inductors; bit rate 10 Gbit/s; board-to-board communication system; chip-to-chip communication system; gain-bandwidth product; limiting amplifier gain; optical interconnects; optical receiver analog front end; power 2 mW; power consumption; size 80 nm; transimpedance gain; voltage 1 V; Active inductors; Bandwidth; Circuits; Energy consumption; Gain; High speed optical techniques; Optical amplifiers; Optical design; Optical receivers; Stimulated emission;

fLanguage

English

Publisher

ieee

Conference_Titel

Micro-Nanoelectronics, Technology and Applications, 2008. EAMTA 2008. Argentine School of

Conference_Location

Buenos Aires

Print_ISBN

978-987-655-003-1

Electronic_ISBN

978-987-655-003-1

Type

conf

Filename

4638979