DocumentCode
477188
Title
Brent-Kung fast adder dscription, simulation and formal verification using lava
Author
Marsó, Leandro
Author_Institution
Fac. de Cienc. Exactas, Fisicas y Naturales, Univ. Nac. de Cordoba, Cordoba
fYear
2008
fDate
18-19 Sept. 2008
Firstpage
111
Lastpage
114
Abstract
Integrated Circuits Design can be made by using ideas that come from computer science, and particularly from functional programming, that can give us more abstract representations and verification techniques in order to keep up with the ever-increasing complexity of modern hardware designs. Using Lava a HDL embedded in Haskell, we explain how to design, simulate, and formal verify a carry chain binary adder and a fast adder parameterized in the size of its inputs.
Keywords
adders; carry logic; formal verification; hardware description languages; integrated circuit design; integrated circuit modelling; logic CAD; Brent-Kung fast adder description; Lava HDL; VHDL; carry chain binary adder; formal verification; functional programming; integrated circuits design; Adders; Application software; Circuit simulation; Computational modeling; Computer science; Formal verification; Hardware; Indium phosphide; Integrated circuit synthesis; Integrated circuit technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Micro-Nanoelectronics, Technology and Applications, 2008. EAMTA 2008. Argentine School of
Conference_Location
Buenos Aires
Print_ISBN
978-987-655-003-1
Electronic_ISBN
978-987-655-003-1
Type
conf
Filename
4638988
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