DocumentCode :
47859
Title :
A Distributive-Transconductance Model for Border Traps in III–V/High-k MOS Capacitors
Author :
Chen Zhang ; Min Xu ; Ye, Peide D. ; Xiuling Li
Author_Institution :
Electr. & Comput. Eng. Dept., Univ. of Illinois, Urbana, IL, USA
Volume :
34
Issue :
6
fYear :
2013
fDate :
Jun-13
Firstpage :
735
Lastpage :
737
Abstract :
By in-depth analysis of the electrical response of border traps in gate oxide, a new border-trap model is proposed where the ac charging and discharging current associated with those traps is proportional to the variation of the surface potential of semiconductors, resembling the behavior of transconductors. In contrast, the border trap current is directly related to the local potential in the gate oxide in the existing model. The model is then used to provide a qualitative understanding of the temperature-dependent frequency dispersion observed on the Al2O3/n-GaAs(111)A MOS capacitors at high positive bias.
Keywords :
III-V semiconductors; MOS capacitors; Al2O3-GaAs; III-V MOS capacitor; border traps; border-trap model; distributive-transconductance model; electrical response; gate oxide; high-k MOS capacitor; semiconductor; temperature-dependent frequency dispersion; transconductor; Border trap; III–V; MOS;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2013.2255256
Filename :
6513297
Link To Document :
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