• DocumentCode
    478839
  • Title

    A novel reconfigurable hardware architecture for IP address lookup

  • Author

    Fadishei, H. ; Zamani, M.S. ; Sabaei, M.

  • Author_Institution
    Comput. & IT Dept., Amir-Kabir Univ. of Technol., Tehran
  • fYear
    2005
  • fDate
    26-28 Oct. 2005
  • Firstpage
    81
  • Lastpage
    90
  • Abstract
    IP address lookup is one of the most challenging problems of Internet routers. In this paper, an IP lookup rate of 263 Mlps (Million lookups per second) is achieved using a novel architecture on reconfigurable hardware platform. A partial reconfiguration may be needed for a small fraction of route updates. Prefixes can be added or removed at a rate of 2 million updates per second, including this hardware reconfiguration overhead. A route update may fail due to the physical resource limitations. In this case, which is rare if the architecture is properly configured initially, a full reconfiguration is needed to allocate more resources to the lookup unit.
  • Keywords
    IP networks; Internet; reconfigurable architectures; table lookup; telecommunication network routing; IP address lookup; Internet routers; lookup unit; reconfigurable hardware architecture; Algorithm design and analysis; Application specific integrated circuits; Computer architecture; Costs; Field programmable gate arrays; Hardware; IP networks; Internet; Permission; Routing; IP address lookup; application specific integrated circuit (ASIC); field-programmable gate array (FPGA); hashing; longest prefix matching; reconfigurable hardware;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Architecture for networking and communications systems, 2005. ANCS 2005. Symposium on
  • Conference_Location
    Princeton, NJ
  • Print_ISBN
    978-1-59593-082-8
  • Type

    conf

  • Filename
    4675268