A Processor for Genetic Algorithm Based on Redundant Binary Number

Author

Aoshima, Masanao ; Kanasugi, Akinori

Author_Institution

Grad. Sch. of Eng., Tokyo Denki Univ., Tokyo

Volume

1

fYear

2008

fDate

11-13 Nov. 2008

Firstpage

581

Lastpage

586

Abstract

A Design and Simulation for DynamicThis paper describes a design of novel processor for genetic algorithm (GA) based on redundant binary number. In conventional GA, genetic information is expressed by binary number. On the other hand, the proposed processor is based on redundant binary number. Therefore, the number of expression of optimized solutions for the target function increase. For this reason, it is easy to find the optimized solution, and error rates decrease. The processor was designed by using VHDL and simulated. The effectiveness of the proposed processor was confirmed by logic circuit simulations.

Keywords

genetic algorithms; hardware description languages; logic circuits; redundant number systems; VHDL; error rates; genetic algorithm; logic circuit simulations; redundant binary number; Biological cells; Character generation; Circuit simulation; Decoding; Error analysis; Flowcharts; Genetic algorithms; Hardware; Machine learning algorithms; Process design; Genetic Algorithm; Redundant binary number;

fLanguage

English

Publisher

ieee

Conference_Titel

Convergence and Hybrid Information Technology, 2008. ICCIT '08. Third International Conference on

Conference_Location

Busan

Print_ISBN

978-0-7695-3407-7

Type

conf

DOI

10.1109/ICCIT.2008.21

Filename

4682089