VLD Design for AVS Video Decoder

In this paper, architecture with combination of software and hardware for AVS variable length code decoding is designed. Logical and feasible division between software and hardware for the system is presented. Under control of embedded CPU, the design can decode fixed length code, unsigned or signed k-th Exp-Golomb code and context-based adaptive2D-VLC (CA-2D-VLC) code. Furthermore, decoding flow of software is given in detail, which can output parsing results and command information in required format. A single module named "VLD" is designed in hardware to meet the requirement of being frequent transferred in CA-2D-VLC decoding. Finally, parsing results of the whole syntax elements from AVS bitstream are output on this platform correctly, which has been proved to support real-time decoding for AVS HDTV video. Though designed for AVS video standard originally, it can be adapted to other coding standards easily.