Title :
A methodology for the ESD test reduction for complex devices
Author :
Maksimovic, Dejan ; Blanc, Fabrice ; Notermans, Guido ; Smedes, Theo ; Keller, Thomas
Author_Institution :
NXP Semicond., Zurich
Abstract :
We define rules to reduce the ESD test complexity for chips with large pin count. These rules exploit the structural similarity in the pad-ring and have a long history of use without bad experiences. Using these rules an automated software tool can be developed for reduced ESD test generation.
Keywords :
digital integrated circuits; electrostatic discharge; integrated circuit packaging; integrated circuit testing; mixed analogue-digital integrated circuits; ESD test reduction; electrostatic discharge; human body model testing; input-output pins; machine model testing; package connectivity; pad-ring; pin count; power pins; structural similarity; Automatic testing; Biological system modeling; Electrostatic discharge; History; Pins; Power supplies; Semiconductor device testing; Software testing; Software tools; Stress;
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium, 2008. EOS/ESD 2008. 30th
Conference_Location :
Tucson, AZ
Print_ISBN :
978-1-58537-146-4
Electronic_ISBN :
978-1-58537-147-1
