DocumentCode :
483379
Title :
A study of advanced technique on RC-triggered NMOSFET power clamp
Author :
Ishizuka, Hiroyasu ; Otsuka, Yoko ; Ikeda, Hiroyuki ; Tanaka, Kiyoshi
Author_Institution :
Renesas Technol. Corp., Kodaira
fYear :
2008
fDate :
7-11 Sept. 2008
Firstpage :
290
Lastpage :
294
Abstract :
We analyzed the relation of ESD robustness of the RC-triggered MOSFET Power Clamp to the Gate voltage and Well voltage. If Gate voltage is suppressed low with Well bias applied, the current concentration is avoided, and IT2 increases so that the ESD robustness target can be achieved. By this technology, HBM>2000V, MM>200V and Automobile Specification Transient Latch-up of over 200V performances are achieved by the 990 um size Discharge NMOS per Power domain.
Keywords :
MOS integrated circuits; MOSFET; RC circuits; electrostatic discharge; ESD robustness; RC-triggered NMOSFET power clamp; automobile specification transient latch-up; gate voltage; well voltage; Clamps; Diodes; Electrostatic discharge; MOS devices; MOSFET circuits; Power MOSFET; Robustness; Stress; Testing; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium, 2008. EOS/ESD 2008. 30th
Conference_Location :
Tucson, AZ
Print_ISBN :
978-1-58537-146-4
Electronic_ISBN :
978-1-58537-147-1
Type :
conf
Filename :
4772146
Link To Document :
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