Bit- and trellis- based soft-decision sequential decoding for variable-length error-correcting codes

Variable-length error-correcting codes (VLECCs) have recently received extensive attention because they can provide both compression and error-correction capabilities simultaneously. The larger free distance a VLECC has, the more redundancy the VLECC suffers from. The redundancy can be used to combat the channel noise effectively by using the technique of joint source-channel decoding (JSCD). However, for larger VLECCs, the high computational decoding complexity has prevented these codes from implementation in practice. In this work, a new bit metric with low computational complexity is derived first, then based on a code trellis rather than on a code tree, we proposed a maximum a posteriori (MAP) bit-level soft-decision sequential decoding algorithm and its two approximations. Simulation results indicate that both approximations can provide nearly the same performance as the MAP scheme while exhibiting a significantly lower complexity.