DocumentCode :
483667
Title :
Performance analysis of high-speed multi-rail data transmission on SMP based architecture
Author :
Tsutsui, Akihiro ; Obana, Kazuaki ; Takizawa, Makoto
Author_Institution :
NTT Network Innovation Labs.
fYear :
2008
fDate :
14-16 Oct. 2008
Firstpage :
1
Lastpage :
5
Abstract :
We present some ideas for designing software architecture that optimizes the resource arrangement of the operating system and application programs in a PC so that Nx10 Gbps near line-rate multi-rail data transmission can be achieved using most popular SMP-based high-end PC architecture. We evaluated the effectiveness of the computation resource arrangement policies we have presented by experimentation. These are necessary because current PC architecture does not make maximum use of multi-rail data links without tactful management of processors, memories and peripheral control. Multi-rail data transmission and multi-wavelength networking devices will be the key to creating next generation terabit LANs.
Keywords :
computer network performance evaluation; data communication; local area networks; software architecture; SMP based architecture; computation resource arrangement policies; designing software architecture; high-speed multi-rail data transmission; multi-rail data links; next generation terabit LAN; Application software; Computer architecture; Data communication; Design optimization; Memory management; Next generation networking; Operating systems; Performance analysis; Software architecture; Software design; PC; SMP; multi core; multi lane; multi processor; multi rail; multi wavelength; terabit LAN;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, 2008. APCC 2008. 14th Asia-Pacific Conference on
Conference_Location :
Tokyo
Print_ISBN :
978-4-88552-232-1
Electronic_ISBN :
978-4-88552-231-4
Type :
conf
Filename :
4773832
Link To Document :
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