A Detailed Study of Gate Insulator Process Dependence of NBTI Using a Compact Model

Author

Joshi, Kishor ; Mukhopadhyay, Saibal ; Goel, Nishith ; Nanware, Nirmal ; Mahapatra, Santanu

Author_Institution

Dept. of Electr. Eng., Indian Inst. of Technol. Bombay, Mumbai, India

Volume

61

Issue

2

fYear

2014

fDate

Feb. 2014

Firstpage

408

Lastpage

415

Abstract

Process impact of negative bias temperature instability (NBTI) is studied in silicon oxynitride (SiON) and high- k metal gate (HKMG) p-MOSFETs. An analytical compact model is used to predict long time degradation. NBTI is shown to be governed by the generation of interface and bulk oxide traps and hole trapping in preexisting traps that are mutually uncorrelated. Experimental evidences are provided to independently verify underlying components. Model parameters are extracted; only a few process-dependent parameters are needed to predict the experimental data from wide range of SiON and HKMG p-MOSFETs at various stress bias and temperature. Similarity between SiON and HKMG devices is highlighted.

Keywords

MOSFET; hole traps; negative bias temperature instability; semiconductor device models; semiconductor device reliability; silicon compounds; HKMG device; NBTI; SiON; analytical compact model; bulk oxide traps; gate insulator process dependence; high-k metal gate p-MOSFET; hole trapping; long time degradation; negative bias temperature instability; silicon oxynitride p-MOSFET; Data models; Insulators; Logic gates; Predictive models; Silicon; Stress; Time measurement; $V_{T}$ shift; Charge pumping (CP); DCIV; flicker noise; high-$k$ metal gate (HKMG); negative bias temperature instability (NBTI) modeling; silicon oxynitride (SiON); trap generation; trapping;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2013.2295844

Filename

6702465